DESIGN FOR TEST DIGITAL IC'S AND EMBEDDED CORE SYSTEMS

The first practical DFT guide from an industry insider.
Skip the high-brow theories and mathematical formulas—get down to the business of digital design and testing as it's done in the real world. Learn practical testing strategies that address today's business needs for quality, reliability, and cost control, working within the tight deadlines of typical high-pressure production environments. Design-for-Test for Digital IC's and Embedded Core Systems helps you optimize the engineering trade-offs between such resources as silicon area, operating frequency, and power consumption, while balancing the corporate concerns of cost-of-test, time-to-market, and time-to-volume. You'll also boost your efficiency with the special focus on automatictest pattern generation (ATPG).
*The book includes a roadmap that allows you to fine-tune your learning if you want to skip directly to a specific subject. Key topics include:
*Core-based design, focusing on embedded cores and embedded memories
*System-on-a-chip and ultra-large scale integrated design issues
*AC scan, at-speed scan, and embedded DFT
*Built-in self-test, including memory BIST, logic BIST, and scan BIST
*Virtual test sockets and testing in isolation
*Design for reuse, including reuse vectors and cores
*Test issues being addressed by VSIA and the IEEE P1500 Standard
*Design-for-Test for Digital IC's and Embedded Core Systems is filled with full-page graphics taken directly from the author's teaching materials. Every section is illustrated with flow-charts, engineering diagrams, and conceptual summariesto make learning and reference fast and easy. This book is a must for the engineers and managers involved in design and testing.
The enclosed CD-ROM contains full-color versions of all the book's illustrations in Acrobat PDF format. These images may be viewed interactively on screen or printed out to create overheads for teaching. Acrobat Reader software for Windows and UNIX computers is included.